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ocn213933971 |
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OCoLC |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
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20250703144300.0 |
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m o d |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
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cr |n||||||||| |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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| fixed length control field |
010813s2001 nyua ob 101 0 eng c |
| 040 ## - CATALOGING SOURCE |
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| Original cataloging agency |
COO |
| Language of cataloging |
eng |
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pn |
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COO |
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CUT |
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WAU |
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OCLCQ |
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YNG |
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OCLCO |
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YDX |
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LIP |
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UAB |
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ESU |
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OCLCQ |
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BUF |
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CEF |
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OCLCQ |
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WYU |
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OCLCQ |
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AUD |
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OCLCQ |
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OCLCQ |
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WSU |
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OCLCO |
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OCLCL |
| 015 ## - NATIONAL BIBLIOGRAPHY NUMBER |
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| National bibliography number |
GBA154704 |
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bnb |
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962078875 |
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DE-101 |
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436620582 |
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| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| International Standard Book Number |
9783540446873 |
| Qualifying information |
(electronic bk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| International Standard Book Number |
3540446877 |
| Qualifying information |
(electronic bk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| Canceled/invalid ISBN |
3540424997 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| Canceled/invalid ISBN |
9783540424994 |
| 024 7# - OTHER STANDARD IDENTIFIER |
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| Standard number or code |
10.1007/3-540-44687-7 |
| Source of number or code |
doi |
| 029 1# - (OCLC) |
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| OCLC library identifier |
AU@ |
| System control number |
000044635023 |
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AU@ |
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000051324789 |
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AU@ |
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000058159865 |
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AU@ |
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000058395145 |
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NZ1 |
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14993759 |
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NZ1 |
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15297371 |
| 035 ## - SYSTEM CONTROL NUMBER |
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| System control number |
(OCoLC)213933971 |
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(OCoLC)436620582 |
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(OCoLC)648150091 |
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(OCoLC)769772997 |
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(OCoLC)793076962 |
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(OCoLC)990601893 |
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(OCoLC)1005762958 |
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(OCoLC)1066588081 |
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(OCoLC)1081246204 |
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(OCoLC)1132298313 |
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| 042 ## - AUTHENTICATION CODE |
|---|
| Authentication code |
pcc |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7895.G36 |
| Item number |
I357 2001 |
| 072 #7 - SUBJECT CATEGORY CODE |
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| Subject category code |
UYD |
| Source |
bicssc |
| 072 #7 - SUBJECT CATEGORY CODE |
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| Subject category code |
COM032000 |
| Source |
bisacsh |
| 072 #7 - SUBJECT CATEGORY CODE |
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| Subject category code |
COM067000 |
| Source |
bisacsh |
| 072 #7 - SUBJECT CATEGORY CODE |
|---|
| Subject category code |
QA |
| Source |
lcco |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.39/5 |
| Edition number |
21 |
| 084 ## - OTHER CLASSIFICATION NUMBER |
|---|
| Classification number |
SS 4800 |
| Number source |
rvk |
| 084 ## - OTHER CLASSIFICATION NUMBER |
|---|
| Classification number |
ELT 360f |
| Number source |
stub |
| 049 ## - LOCAL HOLDINGS (OCLC) |
|---|
| Holding library |
MAIN |
| 111 2# - MAIN ENTRY--MEETING NAME |
|---|
| Meeting name or jurisdiction name as entry element |
International Conference on Field-Programmable Logic and Applications |
| Number of part/section/meeting |
(11th : |
| Date of meeting |
2001 : |
| Location of meeting |
Belfast, Northern Ireland) |
| 9 (RLIN) |
24760 |
| 245 10 - TITLE STATEMENT |
|---|
| Title |
Field-programmable logic and applications : |
| Remainder of title |
11th International Conference, FPL 2001, Belfast, Northern Ireland, UK, August 27-29, 2001 : proceedings / |
| Statement of responsibility, etc. |
Gordon Brebner, Roger Woods (eds.). |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Place of publication, distribution, etc. |
Berlin ; |
| -- |
New York : |
| Name of publisher, distributor, etc. |
Springer, |
| Date of publication, distribution, etc. |
©2001. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
1 online resource (xv, 665 pages) : |
| Other physical details |
illustrations |
| 336 ## - CONTENT TYPE |
|---|
| Content type term |
text |
| Content type code |
txt |
| Source |
rdacontent |
| 337 ## - MEDIA TYPE |
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| Media type term |
computer |
| Media type code |
c |
| Source |
rdamedia |
| 338 ## - CARRIER TYPE |
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| Carrier type term |
online resource |
| Carrier type code |
cr |
| Source |
rdacarrier |
| 347 ## - DIGITAL FILE CHARACTERISTICS |
|---|
| File type |
text file |
| 347 ## - DIGITAL FILE CHARACTERISTICS |
|---|
| Encoding format |
PDF |
| 490 1# - SERIES STATEMENT |
|---|
| Series statement |
Lecture notes in computer science ; |
| Volume/sequential designation |
2147 |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
|---|
| Bibliography, etc |
Includes bibliographical references and index. |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
This book constitutes the refereed proceedings of the 11th International Conference on Field-Programmable Logic and Application, FPL 2001, held in Belfast, Northern Ireland, UK, in August 2001. The 56 revised full papers and 15 short papers presented were carefully reviewed and selected from a total of 117 submissions. The book offers topical sections on architectural framework, place and route, architecture, DSP, synthesis, encryption, runtime reconfiguration, graphics and vision, networking, processor interaction, applications, methodology, loops and systolic, image processing, faults, and arithmetic. |
| 505 0# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
Invited Keynote 1 -- Technology Trends and Adaptive Computing -- Architectural Frameworks -- Prototyping Framework for Reconfigurable Processors -- An Emulator for Exploring RaPiD Configurable Computing Architectures -- Place and Route 1 -- A New Placement Method for Direct Mapping into LUT-Based FPGAs -- fGREP -- Fast Generic Routing Demand Estimation for Placed FPGA Circuits -- Architecture -- Macrocell Architectures for Product Term Embedded Memory Arrays -- Gigahertz Reconfigurable Computing Using SiGe HBT BiCMOS FPGAs -- Memory Synthesis for FPGA-Based Reconfigurable Computers -- DSP 1 -- Implementing a Hidden Markov Model Speech Recognition System in Programmable Logic -- Implementation of (Normalised) RLS Lattice on Virtex -- Accelerating Matrix Product on Reconfigurable Hardware for Signal Processing -- Synthesis -- Static Profile-Driven Compilation for FPGAs -- Synthesizing RTL Hardware from Java Byte Codes -- PuMA++: From Behavioral Specification to Multi-FPGA-Prototype -- Encryption -- Secure Configuration of Field Programmable Gate Arrays -- Single-Chip FPGA Implementation of the Advanced Encryption Standard Algorithm -- JBits"!Implementations of the Advanced Encryption Standard (Rijndael) -- Runtime Recon.guration 1 -- Task-Parallel Programming of Reconfigurable Systems -- Chip-Based Reconfigurable Task Management -- Configuration Caching and Swapping -- Graphics and Vision -- Multiple Stereo Matching Using an Extended Architecture -- Implementation of a NURBS to Bézier Conversor with Constant Latency -- Reconfigurable Frame-Grabber for Real-Time Automated Visual Inspection (RT-AVI) Systems -- Invited Keynote 2 -- Processing Models for the Next Generation Network -- Place and Route 2 -- Tightly Integrated Placement and Routing for FPGAs -- Gambit: A Tool for the Simultaneous Placement and Detailed Routing of Gate-Arrays -- Networking -- Reconfigurable Router Modules Using Network Protocol Wrappers -- Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware -- Processor Interaction -- The MOLEN??-Coded Processor -- Run-Time Optimized Reconfiguration Using Instruction Forecasting -- CRISP: A Template for Reconfigurable Instruction Set Processors -- Applications -- Evaluation of an FPGA Implementation of the Discrete Element Method -- Run-Time Performance Optimization of an FPGA-Based Deduction Engine for SAT Solvers -- A Reconfigurable Embedded Input Device for Kinetically Challenged Persons -- Methodology 1 -- Bubble Partitioning for LUT-Based Sequential Circuits -- Rapid Construction of Partial Configuration Datastreams from High-Level Constructs Using JBits -- Placing, Routing, and Editing Virtual FPGAs -- DSP 2 -- Virtex Implementation of Pipelined Adaptive LMS Predictor in Electronic Support Measures Receiver -- A Music Synthesizer on FPGA -- Motivation from a Full-Rate Specific Design to a DSP Core Approach for GSM Vocoders -- Loops and Systolic -- Loop Tiling for Reconfigurable Accelerators -- The Systolic Ring: A Dynamically Reconfigurable Architecture for Embedded Systems -- A n-Bit Reconfigurable Scalar Quantiser -- Image Processing -- Real Time Morphological Image Contrast Enhancement in Virtex FPGA -- Demonstrating Real-time JPEG Image Compression-Decompression using Standard Component IP Cores on a Programmable Logic based Platform for DSP and Image Processing -- Design and Implementation of an Accelerated Gabor Filter Bank Using Parallel Hardware -- Invited Keynote 3 -- The Evolution of Programmable Logic: Past, Present, and Future Predictions -- Runtime Reconfiguration 2 -- Dynamically Reconfigurable Cores -- Reconfigurable Breakpoints for Co-debug -- Faults -- Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification -- FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits -- Methodology 2 -- A Generic Library for Adaptive Computing Environments -- Generative Development System for FPGA essors with Active Components -- Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines -- System Level Tools for DSP in FPGAs -- Arithmetic -- Parameterized Function Evaluation for FPGAs -- Efficient Constant Coefficient Multiplication Using Advanced FPGA Architectures -- A Digit-Serial Structure for Reconfigurable Multipliers -- FPGA Resource Reduction Through Truncated Multiplication -- Short Papers 1 -- Efficient Mapping of Pre-synthesized IP-Cores onto Dynamically Reconfigurable Array Architectures -- An FPGA-Based Syntactic Parser for Real-Life Almost Unrestricted Context-Free Grammars -- Hardware-Software Partitioning: A Reconfigurable and Evolutionary Computing Approach -- An Approach to Real-Time Visualization of PIV Method with FPGA -- FPGA-Based Discrete Wavelet Transforms System -- X-MatchPRO: A ProASIC-Based 200 Mbytes/s Full-Duplex Lossless Data Compressor -- Arithmetic Operation Oriented Reconfigurable Chip: RHW -- Short Papers 2 -- Initial Analysis of the Proteus Architecture -- Building Asynchronous Circuits with JBits -- Case Study of Integration of Reconfigurable Logic as a Coprocessor into a SCI-Cluster under RT-Linux -- A Reconfigurable Approach to Packet Filtering -- FPGA-Based Modelling Unit for High Speed Lossless Arithmetic Coding -- A Data Re-use Based Compiler Optimization for FPGAs -- Dijkstra's Shortest Path Routing Algorithm in Reconfigurable Hardware -- A System on Chip for Power Line Communications According to European Home Systems Specifications. |
| 546 ## - LANGUAGE NOTE |
|---|
| Language note |
English. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Field programmable gate arrays |
| Form subdivision |
Congresses. |
| 9 (RLIN) |
18231 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Programmable array logic |
| Form subdivision |
Congresses. |
| 9 (RLIN) |
18232 |
| 650 #6 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Réseaux logiques programmables par l'utilisateur |
| Form subdivision |
Congrès. |
| 9 (RLIN) |
29392 |
| 650 #6 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Logique à réseau programmable |
| Form subdivision |
Congrès. |
| 9 (RLIN) |
966944 |
| 650 #7 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Field programmable gate arrays |
| Source of heading or term |
fast |
| 9 (RLIN) |
18233 |
| 650 #7 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Programmable array logic |
| Source of heading or term |
fast |
| 9 (RLIN) |
18234 |
| 655 #4 - INDEX TERM--GENRE/FORM |
|---|
| Genre/form data or focus term |
Online resources. |
| 9 (RLIN) |
15049 |
| 655 #7 - INDEX TERM--GENRE/FORM |
|---|
| Genre/form data or focus term |
proceedings (reports) |
| Source of term |
aat |
| 655 #7 - INDEX TERM--GENRE/FORM |
|---|
| Genre/form data or focus term |
Conference papers and proceedings |
| Source of term |
fast |
| 9 (RLIN) |
6065 |
| 655 #7 - INDEX TERM--GENRE/FORM |
|---|
| Genre/form data or focus term |
Conference papers and proceedings. |
| Source of term |
lcgft |
| 9 (RLIN) |
6065 |
| 655 #7 - INDEX TERM--GENRE/FORM |
|---|
| Genre/form data or focus term |
Actes de congrès. |
| Source of term |
rvmgf |
| 9 (RLIN) |
609890 |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Brebner, Gordon. |
| 9 (RLIN) |
24761 |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Woods, Roger, |
| Dates associated with a name |
1963- |
| -- |
https://id.oclc.org/worldcat/entity/E39PCjDWY6mVmgB6gcWv3v9PpK |
| 9 (RLIN) |
24762 |
| 758 ## - |
|---|
| -- |
has work: |
| -- |
Field-programmable logic and applications (Text) |
| -- |
https://id.oclc.org/worldcat/entity/E39PCFw6FjqWw9FRHCp793XVvd |
| -- |
https://id.oclc.org/worldcat/ontology/hasWork |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
|---|
| Relationship information |
Print version: |
| Main entry heading |
International Conference on Field-Programmable Logic and Applications (11th : 2001 : Belfast, Northern Ireland). |
| Title |
Field-programmable logic and applications. |
| Place, publisher, and date of publication |
Berlin ; New York : Springer, ©2001 |
| International Standard Book Number |
3540424997 |
| Record control number |
(OCoLC)47797446 |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
|---|
| Uniform title |
Lecture notes in computer science ; |
| Volume number/sequential designation |
2147. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Uniform Resource Identifier |
<a href="https://link.springer.com/10.1007/3-540-44687-7">https://link.springer.com/10.1007/3-540-44687-7</a> |
| 938 ## - |
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Askews and Holts Library Services |
| -- |
ASKH |
| -- |
AH20754787 |
| 938 ## - |
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ProQuest Ebook Central |
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EBLB |
| -- |
EBL3072592 |
| 938 ## - |
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YBP Library Services |
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YANK |
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13350639 |
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92 |
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ATIST |